The Hardware Renaissance: Pat Gelsinger on the New Physics of AI Buildout
Key points
Key takeaways from a16z show interview with former Intel CEO and Playground Global General Partner Pat Gelsinger (October 2026):
The best time to build hardware. Gelsinger, who designed Intel's 386 and 486 processors, argues this is the strongest moment in decades for hardware founders: AI is rewriting design, manufacturing and packaging economics, and physical constraints now dominate the roadmap.
AI inside the design loop. AI can transform chip design — assisting with RTL, verification and place-and-route — but Gelsinger cautions that faster design alone will not solve the industry's biggest problems; silicon still takes around nine months to make, and physical verification remains the bottleneck.
Consolidation ahead. Today's explosion of specialised AI chips will eventually consolidate around a smaller number of architectures, as software ecosystems, supply chains and customer demand converge on fewer winners.
The memory and packaging squeeze. The industry's real constraints sit in manufacturing, memory bandwidth, advanced packaging and power; Gelsinger calls HBM a 'hideous' memory to build and operate, and sees tall stacked chip designs pushing the limits of what packaging can deliver.
Beyond copper. New memory technologies and the shift from copper to optical networking are coming, driven by the same power and bandwidth pressures now shaping every AI data centre.
Energy is the constraint. Energy capacity increasingly equals economic capacity — power, not transistors, is becoming the binding limit on AI growth, and Gelsinger sees this reshaping where compute gets built and who controls it.
A VMware for agents. Revisiting his VMware years, Gelsinger asks what virtualisation looks like when infrastructure is built for agents rather than humans — an operating layer for machine-scale workloads that he expects to be one of the next big platform opportunities.
Read more: YouTube · a16z Podcast
