Nusemi

Nusemi, established in 2015, operated in the semiconductor sector, focusing on providing mixed-signal circuit design and signal processing solutions. The company was founded by a team of industry veterans, including Co-Founder and CEO Stefanos Sidiropoulos. Nusemi was headquartered in Mountain View, California, a strategic location within Silicon Valley.

The firm specialized in the development of ultra-high-speed Serializer/Deserializer (SerDes) communications IP. SerDes technology is critical for high-speed data transmission, converting parallel data streams into a single, high-speed serial stream and back again, which enhances signal reliability. This intellectual property was aimed at clients in the hyperscale datacenter, edge computing, networking, and telecom segments, addressing the escalating demand for increased bandwidth. Nusemi's business model centered on licensing its SerDes IP to companies that design and manufacture complex integrated circuits and systems on chips (SoCs). The core value proposition was to enable very high bandwidth and efficient data transfer solutions with reduced power consumption and cost.

A significant milestone in the company's history was its acquisition by Cadence Design Systems, Inc. (NASDAQ:CDNS) on November 1, 2017. This acquisition was a strategic move for Cadence to expand its high-speed communications IP portfolio, integrating Nusemi's next-generation SerDes technology with its own strengths in memory, storage, interconnect, and digital signal processing (DSP) IP. Prior to the acquisition, Nusemi had successfully raised capital, including a notable $4.00M Venture Round on January 19, 2017, bringing its total funding to approximately $10.6M.

Keywords: SerDes IP, serializer/deserializer, high-speed communications, mixed signal circuit design, signal processing solutions, datacenter connectivity, edge computing, networking IP, telecom infrastructure, semiconductor IP, Cadence Design Systems, Stefanos Sidiropoulos, ultra-high-speed SerDes, parallel-to-serial conversion, chip-to-chip communication, backplane interconnect, optical interconnect, FinFET nodes, system-on-chip design, IP licensing