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ESilicon

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Semiconductor design and manufacturing services company that delivers custom ics and ips to oems

Sunnyvale, United StatesFounded 1999Marketing
Valuation $10–25M Last recorded · 2010
Headcount 100–500 Current team size
Total funding $100–500M Disclosed equity funding
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About ESilicon

eSilicon operated as a fabless semiconductor company, providing services for designing and manufacturing custom application-specific integrated circuits (ASICs) and licensing semiconductor intellectual property (IP). The company was founded in 1999 by Anjan AJ Sen, who developed the business plan while at Harvard Business School, with Jack Harding joining as CEO in 2000. Harding, a semiconductor industry veteran with prior CEO roles at Cadence Design Systems and Cooper & Chyan Technology, aimed to create a more flexible, internet-driven model for semiconductor development.

eSilicon's business model centered on being a value chain producer, managing the entire process from chip design to manufacturing and supply chain management for its clients. This fabless approach meant the company outsourced all semiconductor manufacturing to foundry partners like TSMC and Samsung, allowing it to focus on complex design and IP development without the overhead of maintaining its own fabrication plants. Revenue was generated through the sale of custom-designed chips and related services, as well as IP licensing. The company served a specialized client base of original equipment manufacturers (OEMs), integrated device manufacturers (IDMs), and other fabless semiconductor firms across high-growth markets such as high-performance computing, high-bandwidth networking, AI, and 5G infrastructure.

A significant milestone in eSilicon's history was supplying a key ASIC for Apple's iPod, which drove revenues to $91 million in 2004. After Apple changed its strategy in 2006, eSilicon successfully diversified its customer base. The company's offerings included complex FinFET-class ASICs, advanced 2.5D packaging solutions, and a portfolio of market-specific IP. This IP portfolio featured high-speed SerDes, High-Bandwidth Memory (HBM) PHY, Ternary Content-Addressable Memory (TCAM), and specialized memory compilers. Additionally, its neuASIC™ platform provided AI-specific IP and a modular design methodology for creating adaptable AI ASICs. On November 11, 2019, Inphi Corporation announced its acquisition of eSilicon for $216 million, a deal that was finalized on January 13, 2020. Concurrently, eSilicon's embedded memory and interface IP assets were sold to Synopsys. The acquisition by Inphi (which was later acquired by Marvell Technology) was intended to combine Inphi's strengths in high-speed data movement with eSilicon's expertise in custom silicon and 2.5D packaging.

Source: Dealroom company data

At a glance

Founded
1999
Headquarters
Sunnyvale, United States
Sector
Marketing

Investors

7 investors on the cap table

From Dealroom's funding and investor records, grouped by the round each investor first entered.

Series A2 investors entered at this stage

  • Crosspoint Venture Partners
  • Catamount Ventures

Series B and later5 investors entered at this stage

  • Fremont Ventures
  • Crescendo Ventures
  • RWI Group
  • Investor Growth Capital
  • Runway Growth Capital
Team profiled 28 named & role-tagged
Founders Hidden — book a demo/100 quality score
Key operators 2 quality Hidden — book a demo/100
Potential founders Hidden — book a demo likely future founders
Startup mafia Hidden — book a demo alumni-founded startups
Talent movements Hidden — book a demo in · Hidden — book a demo out past 12 months

Source: Dealroom Talent Intelligence.

Global footprint

Workforce and web traffic by country
Workforce by country
11 countries with
team presence
🇻🇳 Vietnam59.2%
🇺🇸 United States12.2%
🇨🇳 China8.2%
🇮🇹 Italy6.1%
🇸🇬 Singapore4.1%
Top 5 of 11 shown

Market sentiment

Posts on X, past 7 days

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Reading the room on X — pulling top posts and synthesizing themes…

Source: X recent search ranked by engagement (likes + retweets) · Synthesis by Claude · Cached for 1 hour

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