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EoPlex Technologies

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Creator of a high-volume 3d printing technology and process for printed semiconductor packing and other devices

San Jose, United StatesFounded 2001Semiconductors
Valuation $10–25M Last recorded · 2009
Headcount <100 Current team size
Total funding $10–50M Disclosed equity funding
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About EoPlex Technologies

EoPlex Technologies, founded in 2001 and headquartered in San Jose, CA, operates within the semiconductor manufacturing sector, providing additive manufacturing processes for semiconductor packaging. The company was established by Charles Taylor and later led by CEO Michael Loh Soon Gnee. Before its acquisition, EoPlex secured approximately $20.1 million in venture capital from investors including ATA Ventures, Draper Fisher Jurvetson Management, and Labrador Ventures. In a significant milestone, ASTI Holdings acquired EoPlex on February 1, 2012, integrating it as a subsidiary.

The core of EoPlex's business is its proprietary Configurable Sintered Interconnect (CSI™) platform, which utilizes 3D printing technology. This process involves depositing specialized metal and ceramic 'inks' to print package components onto a temporary stainless steel carrier that is removed after assembly and testing. This method serves as a smart alternative to traditional leadframe technology, targeting the growing demand for smaller and more cost-efficient semiconductor packages driven by the mobile, wearable, and IoT device markets. The business model appears to be B2B, focusing on designing and manufacturing electronic components for original equipment manufacturers (OEMs).

The CSI™ technology enables the production of ultra-thin packages, some less than 250µ thick, and supports high lead counts up to 500. A key benefit is the ability to produce electrically isolated devices on the strip, which facilitates more efficient strip testing at the final stage, reducing handling time and test costs. This allows for the use of Quad Flat No-lead (QFN) processing for packages that would typically require bulkier and more expensive options like Quad Flat Package (QFP) and Ball Grid Array (BGA). The technology's flexibility extends to multi-die and System-in-Package (SiP) applications, enhancing electrical and thermal performance while significantly reducing package size and cost.

Source: Dealroom company data

At a glance

Founded
2001
Headquarters
San Jose, United States
Sector
Semiconductors

Investors

4 investors on the cap table

From Dealroom's funding and investor records, grouped by the round each investor first entered.

Series A3 investors entered at this stage

Series B and later1 investor entered at this stage

  • ATA Ventures
Team profiled 15 named & role-tagged
Founders Hidden — book a demo/100 quality score
Key operators 4 quality Hidden — book a demo/100
Potential founders Hidden — book a demo likely future founders
Startup mafia Hidden — book a demo alumni-founded startups
Talent movements Hidden — book a demo in · Hidden — book a demo out past 12 months

Source: Dealroom Talent Intelligence.

Global footprint

Workforce and web traffic by country
Workforce by country
1 countries with
team presence
🇺🇸 United States100%
1 country shown

Market sentiment

Posts on X, past 7 days

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Source: X recent search ranked by engagement (likes + retweets) · Synthesis by Claude · Cached for 1 hour

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