Celero Communications

Celero Communications is a US-based startup developing advanced chips to improve connectivity between geographically dispersed artificial intelligence data centers. The company, founded in 2024 by networking industry veterans Nariman Yousefi and Oscar Agazzi, is headquartered in Irvine, California, with design centers in Canada and Argentina. Both founders are former senior executives from Marvell Technology, a major supplier of data center connection chips. They bring deep expertise in analog design, digital signal processing, and system architecture from their time at companies like Marvell, Inphi, Broadcom, and ClariPhy.

Celero is focused on designing next-generation coherent Digital Signal Processor (DSP) solutions that translate light bursts from fiber-optic cables into electrical signals for computing networks. This technology addresses the growing demand for faster, more power-efficient data connections driven by the expansion of massive AI data center campuses by tech giants like Alphabet and Meta. The company's chips utilize new embedded algorithms to process light over existing fiber-optic infrastructure more efficiently, aiming to enhance performance and reduce costs for large-scale AI workloads. This approach seeks to bridge the performance gap between existing campus-level networking chips, which lack long-distance capabilities, and traditional telecommunications chips, which are often too expensive and power-intensive for widespread AI use.

Celero Communications has secured a total of $140 million in funding. This includes a $100 million Series B round led by CapitalG, Alphabet's independent growth fund, and a previously undisclosed $40 million Series A round led by Sutter Hill Ventures, with participation from other investors. The company's clients are large-scale data center operators, particularly those building out AI infrastructure.

Keywords: coherent DSP, AI infrastructure, optical connectivity, data center interconnect, digital signal processor, fiber-optic networking, semiconductors, high-bandwidth connectivity, low-power chips, accelerated computing, AI accelerator clusters, cloud data center, networking chips, system architecture, analog design, signal processing, optical interconnects, AI networking