Bluespec

About Bluespec

Bluespec Inc. operates within the Electronic Design Automation (EDA) sector, providing high-level synthesis (HLS) tools and silicon IP for designers of application-specific integrated circuits (ASICs) and field-programmable gate arrays (FPGAs). The firm was established in June 2003 by Professor Arvind Mithal of MIT and Joe Stoy of Oxford University. Arvind's research background in dataflow computing and parallel programming languages was foundational to the company's technology. Prior to Bluespec, he founded Sandburst in 2000 to produce chips for 10-gigabit Ethernet routers, an experience which informed the development of Bluespec's core technology.

The company's business model centers on selling its HLS toolset and licensing its RISC-V based silicon IP to semiconductor design teams at companies like Hitachi and in partnership with firms like Siemens and Synopsys. Its client base consists of hardware designers and architects who need to manage the complexity of control logic and complex datapaths in modern chip designs. By providing synthesizable models, Bluespec enables the use of emulation much earlier in the design cycle for modeling, verification, and early software development. The company has secured $26.8 million in funding over eight rounds from investors including Atlas Venture and North Bridge Venture Partners, with the most recent being a $5 million Series C round in February 2023.

Bluespec's primary offering is its toolset built around Bluespec SystemVerilog (BSV), a high-level hardware description language developed by Arvind and Lennart Augustsson. BSV is based on the functional programming language Haskell and is extended to handle chip design, compiling down to standard Verilog RTL design files. This allows designers to operate at a higher level of abstraction, reducing design time and bugs. A key product is Accelerate-HLS, which integrates with Siemens' Catapult HLS software and leverages RISC-V processors to offload complex tasks like memory management, thereby simplifying and speeding up hardware development. Bluespec also provides a family of open-source RISC-V processor cores, such as Piccolo and Flute, intended for applications ranging from IoT devices to systems requiring virtual memory. These cores, along with verification tools and a complete software development environment, aim to lower the risk and cost of adopting the open RISC-V instruction set architecture.