Azuro

Azuro, Inc. operated in the electronic design automation (EDA) sector, providing specialized software tools for designing digital semiconductor chips. The company was founded in Cambridge, UK, in 2002 by Paul Cunningham and Steev Wilcox, who developed the core technology from their doctoral research at the University of Cambridge. Cunningham, who served as CEO, had prior experience at Sun Microsystems working on high-performance pipeline design and EDA tool development. Wilcox acted as the company's chief architect.

The firm's business was centered on developing and licensing software that addressed critical challenges in modern system-on-a-chip (SoC) design, specifically related to power consumption and performance. Its client base consisted of major semiconductor companies, including Broadcom, STMicroelectronics, NVIDIA, NXP, and Texas Instruments. Azuro generated revenue by selling licenses for its software products, which helped these clients accelerate their chip development process and improve the final silicon's quality. By 2006, the company had raised $13.3 million in venture funding from investors like Benchmark Capital and TTP Ventures to expand its operations and product development.

Azuro's flagship product line included PowerCentric and Rubix, which focused on clock tree synthesis (CTS) and concurrent optimization. In complex SoCs, the clock network—which synchronizes all operations—can consume up to 50% of the chip's power. Azuro's technology provided a distinct approach by integrating clock gating with the physical implementation of the clock network. This allowed for more effective power reduction by preventing the clock signal from reaching unused parts of the chip. The software, known as ccopt (clock concurrent optimization), delivered improvements in power usage, performance, and area (PPA) by merging several design steps, such as timing-driven placement, useful-skew clock tree synthesis, and various post-CTS optimizations. This automation was particularly beneficial for advanced designs with numerous interleaved clock domains, significantly reducing insertion delay and helping designers meet aggressive performance targets.

A significant milestone for Azuro was its acquisition by Cadence Design Systems on July 11, 2011. Cadence, a leader in the EDA industry, acquired Azuro to integrate its disruptive optimization technology into the Cadence Encounter Digital Implementation flow, offering it immediately as an upgrade to existing customers. All key management and technical personnel, including the founders, transitioned to Cadence following the acquisition.

Keywords: electronic design automation, EDA, semiconductor design, clock tree synthesis, CTS, physical optimization, system-on-a-chip, SoC, low-power design, chip design software, PowerCentric, ccopt, clock concurrent optimization, integrated circuit design, Paul Cunningham, Steev Wilcox, Cadence Design Systems, silicon optimization, timing closure, power performance area, PPA